, Electrostatic discharge immunity test ? Basic EMC Publication. 1995. [2] Industry Council on ESD Target Levels, White Paper "System Level ESD, Part I: Common Misconceptions and Recommended Basic Approaches, IEC61000-4-2. Electromagnetic Compatibility
Building-up of system level ESD modeling: Impact of a decoupling capacitance on ESD propagation Electrical Overstress/ Electrostatic Discharge Symposium Behavioral-Modeling Methodology to Predict Electrostatic-Discharge Susceptibility Failures at System Level : an IBIS Improvement Cooperative generic IC characterisation and simulation methods for esd system levelstress Vhdl analog and mixed-signal Determination Of Threshold Voltage Levels Of Semiconductor Diodes And Transistors Due To Pulsed Voltages, Electrical Overstress/ Electrostatic Discharge Symposium, pp.15-244, 1968. ,
Integration of TLP analysis for ESD troubleshooting, EOS/ESD Symposium, vol.9, pp.440-447, 2001. ,
TLP Measurements for Verification of ESD Protection Device Response, IEEE transactions on electronics packaging manufacturing, vol.24, issue.2, 2001. ,
Impact of the power supply on the ESD system level robustness, Electrical Overstress/ Electrostatic Discharge Symposium, pp.3-8, 2010. ,
, Input Output Buffer Information Specification) ANSI/EIA-656B, www.eigroup.org, IBISIBIS
Practical Transient System-level ESD Modeling -Environment Contribution, Electrical Overstress/Electrostatic Discharge SymposiumEOS, p.36, 2014. ,